FIG. 1 schematically represents an electronic architecture of a portable device equipped with a power management system. The electronic architecture is partitioned into several macrofunctions, FCT1, FCT2, etc., able to function independently from one another. In a mobile phone, the macrofunctions can be WiFi connectivity, 3G connectivity, GSM connectivity, playing music, playing videos, FM radio, etc.
Each macrofunction is supplied between a high-voltage line Vdd and a reference line Vss. The Vdd line is distributed to each macrofunction by a respective MOS power transistor MPs controlled in independent manner by a power management circuit, not shown. In this configuration, called a header configuration, where the power transistors are connected to the high-voltage line, the transistors are of P-conductivity type. In a complementary configuration, called a footer configuration, N-conductivity power transistors distribute reference line Vss to the macrofunctions.
Each transistor MPs is dimensioned according to the current consumed by the macrofunction which it supplies. In fact, each transistor MPs is formed by multiple elementary transistors connected in parallel and distributed along a local supply line to the macrofunction. A transistor MPs can be formed by hundreds or even thousands of elementary transistors.
The role of the power management system, in this context, is to detect the unused macrofunctions and to cut off their power supply by means of power transistors MPs until they are next used. These macrofunctions then stop consuming current.
Static consumption may not be completely eliminated, as it depends on the leakage currents of transistors MPs when the latter are in off state. The static consumption then depends on the parameters of transistors MPs, i.e. on the type and dimensioning of the elementary transistors constituting transistors MPs and on the number of elementary transistors. The leakage currents of power transistors MPs in off state are nevertheless several decades lower than the leakage currents of macrofunctions FCT, based upon the technologies used at present for the transistors of macrofunctions FCT.
The leakage current of a MOS transistor can be reduced by increasing the threshold voltage Vt of the transistor, i.e. the minimum gate-source voltage to be applied for the transistor to turn on. It may be known to increase the threshold voltage by reverse biasing the intrinsic diode present between the source and substrate of the transistor, which is referred to as reverse body biasing (RBB). For this, a voltage Vdds is applied to the substrate that is higher than the voltage Vdd for a P-conductivity transistor, and lower than the voltage Vss for an N-conductivity transistor. A third supply voltage may be desirable. In the absence of a third supply voltage, relatively good results are obtained by connecting the substrate to the high supply voltage Vdd for a P-conductivity transistor and to the low supply voltage Vss for an N-conductivity transistor. The intrinsic diode is then biased to zero voltage.
A transistor thus configured to have low leakage in the off state does, on the other hand, present a higher resistance in the on state Ron, which may not be desirable for a power transistor which would then dissipate more power. In the configuration of FIG. 1, the macrofunctions may have a substantially lower supply voltage available than the scheduled supply voltage based upon the larger voltage drop at the terminals of power transistors MPs.
The resistance of a transistor in the on state Ron may be reduced by reducing the transistor threshold voltage Vt. This may be achieved by forward biasing the intrinsic source-substrate diode of the transistor, which is referred to as forward body biasing (FBB). Thus, to have a transistor that presents both low leakage in the off state and a low resistance in the on state, the techniques of RBB and FBB may be combined.
FIG. 2 illustrates an attempt described in the article “Dynamic Threshold-Voltage MOSFET (DTMOS) for Ultra-Low Voltage VLSI,” by Fariborz Assaderaghi, Dennis Sinitsky, Stephen A. Parke, Jeffrey Bokor, Ping K. Ko, and Chenming Hu, IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 44, NO. 3, MARCH 1997. This article proposes, as represented, to connect the substrate to the transistor gate. Thus, in the represented case of a P-conductivity transistor MP, when the gate voltage increases, tending to turn the transistor off, the bias of the substrate, and therefore the threshold voltage, is increased, which reduces the leakage current. When the gate voltage decreases, tending to turn the transistor on, the intrinsic source-substrate diode (represented in broken lines) is forward biased when the gate voltage drops below Vdd-Vjct, where Vjct is the threshold voltage of the intrinsic diode. This reduces the threshold voltage of the transistor, and therefore the resistance in the on state Ron.
It may be desirable that the gate voltage, on the other hand, not drop very far below Vdd-Vjct, as the intrinsic diode presents a relatively low impedance and may start to conduct a high current from its anode connected to Vdd to its cathode dragged to voltage Vss by the gate control signal. This approach may therefore be reserved for applications with a very low supply voltage (about 0.6 V).
For a higher supply voltage, the above-mentioned article introduces a limiter on the connection between the gate and substrate enabling the gate voltage to vary between Vdd and Vss, while at the same time limiting the substrate voltage to a sufficient value to forward bias the intrinsic diode without drawing too much current. The limiter described uses a generic voltage source, but no practical embodiment of this voltage source is proposed.
The various studies published on forward biasing of the intrinsic source-substrate diode of a transistor (FBB) are in fact theoretical and do not approach any commercially viable embodiment of the voltage source, apart from any provision of an additional external voltage source.
For example, the article “An E-TSPC Divide-by-2 Circuit With Forward Body Biasing in 0.25 μm CMOS,” by Seungsoo Kim and Hyunchol Shin, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL. 19, NO. 10. OCTOBER 2009, describes a voltage source provided by a resistor bridge. The surface occupied by the resistor bridge proves to be 100 times larger than the surface of the circuit composed of the transistors whose substrates are biased.